email: sales@murata-ps.com 29 apr 2010 mdc_s101-084-s101-00.b01 page 1 of 6 s101-084-s101-00 5.0v input, 1.5 to 3.3v output @ 7a www.murata-ps.com for full details go to www.murata-ps.com/rohs $ www.murata-ps.com features output current up to 7a 5.0v 10% input regulation 0.4% line and load industry standard pin con? guration high ef? ciency to 90% remote sense, trim and enable short circuit protection mtbf 3.9 million hours this product is not fuse protected. user is responsible for providing system pro- tection. consult factory for application information. specifications * s101-05 input specifications input voltage range 5.0v 10% measured at +vin pin external input capacitor minimum 200f with adequate ripple current rating see also note on pg 6 and chart on pg 4 output specifications standard output voltages and output current 1.5v standard setpoint accuracy varies 1.3%. contact factory for tighter tolerances. see note on pg 5 for trimming to different volt- ages. 1.8v 2.1v 2.5v 3.3v output current 7a 100 lfm at 70c load regulation 0.4% 0 to 7a load line regulation 0.4% over speci? ed input voltage range external output capacitor >150f with maxesr = 100m see also note on pg 6 short circuit protection 200% of maximum rated current general specifications enable *** on - open or high / off - low efficiency 90% for 3.3v see ef? ciency curves on pg 4 isolation non-isolated switching frequency 300 khz constant approvals and standards ul 94v-0 protection fusing unit is not fused. operating temperature **** 0c to 60c storage temperature -40c to 125c non-condensing mtbf 4.1 million hours per rac prism at 50c ambient and 200 lfm * all speci? cations are typical at nominal input, full load at 25c unless otherwise stated. *** pull below 0.5v and sink greater than 1ma to disable the sip; pull above 4v (do not exceed 12v) and source greater than 10 a or leave open to enable the sip. **** the output capacitors must meet the max esr = 100m requirement over the operating temperature range.
email: sales@murata-ps.com 29 apr 2010 mdc_s101-084-s101-00.b01 page 2 of 6 s101-084-s101-00 5.0v input, 1.5 to 3.3v output @ 7a www.murata-ps.com initial setpoint tolerance 0.0 1.0 1.0 1.5 2.0 2.0 2.5 3.0 3.0 3.5 4.0 5.0 6.0 output voltage (v) setpoint tolerance (%) initial setpoint tolerance for 5v input sips part number coding connector pin function connector pin function j1 1 vout j2 1 ground 2 vout 2 vin 3 remote sense 3 vin 4 vout 4 empty 5 ground 5 trim 6 enable pin assignment input voltage 05 = 5v 05 s101 2 0 set point tolerance 0 = factory standard (see speci cations) mechanical options 2 = vertical top side pins (standard) model number xyz feature options b = remote sense, trim and enable (standard) 3 = trim and enable pin length b = .145 inch (standard) output voltage xyz = x.yz volts b b - -
email: sales@murata-ps.com 29 apr 2010 mdc_s101-084-s101-00.b01 page 3 of 6 s101-084-s101-00 5.0v input, 1.5 to 3.3v output @ 7a www.murata-ps.com 6 2 2 13 2.55 (64.77) max .540 (13.72) max 45 1 3 5 l .020 (5.08 .5) 1.400 (35.56) .100 (2.54) typ .30 (7.62) .025 (.62) sq j1 j2 top side 1.800 (45.72) mechanical option 2 .03 mech option #2 (standard) .360 max .218 max .072 max * recommended customer hole size 0.046 .003 with 0.070 pad both sides 1. dimensions are in inches and (millimeters). 2. tolerances: (unless otherwise noted) inches .xx .020 .xxx .010 millimeters .x 0.5 .xx 0.25 pin: .002 0.05 mechanical dimensions
email: sales@murata-ps.com 29 apr 2010 mdc_s101-084-s101-00.b01 page 4 of 6 s101-084-s101-00 5.0v input, 1.5 to 3.3v output @ 7a www.murata-ps.com efficiency curves at 25c input ripple current 1.5v 60 65 70 75 80 85 90 95 1234567 load curre nt (a) efficiency (%) 4.5 v input 5.0 v input 5.5 v input 3.3v 60 65 70 75 80 85 90 95 1234567 load curre nt (a) efficiency (%) 4.5 v input 5.0 v input 5.5 v input required ripple current ratings required for input bulk capacitor.
email: sales@murata-ps.com 29 apr 2010 mdc_s101-084-s101-00.b01 page 5 of 6 s101-084-s101-00 5.0v input, 1.5 to 3.3v output @ 7a www.murata-ps.com resistor trim equations trimming up (v outup > v set ) connect the trim up resistor between the trim pin (j1-5) and the ground pin (j1-1). trimming down (v ref < v out down email: sales@murata-ps.com 29 apr 2010 mdc_s101-084-s101-00.b01 page 6 of 6 s101-084-s101-00 5.0v input, 1.5 to 3.3v output @ 7a murata power solutions, inc. makes no representation that the use of its products in the circuits described herein, or the use of other technical information contained herein, will not infringe upon existing or future patent rights. the descriptions contained her ein do not imply the granting of licenses to make, use, or sell equipment constructed in accordance therewith. speci? cations are subject to cha nge without notice. ? 2010 murata power solutions, inc. murata power solutions, inc. 11 cabot boulevard, mans? eld, ma 02048-1151 u.s.a. iso 9001 and 14001 registered www.murata-ps.com/locations external capacitance for sip products a ll sip products require external capacitance to be placed on the system board that the sip will be designed into. this application note is an attem pt to explain how to translate datasheet inform ation and apply it to a system level board design. i nput capacitance a lthough input capacitance value is not critical, the input capacitors m ust be capable of storing fairly large am ounts of energy. this m eans, for exam ple, sm all ceram ic capacitors would be inappropriate. the prim ary criteria, though, for choosing the input capacitors is ac ripple current rating. the sip datasheet contains a chart showing ripple current vs. output current (or output power). the system designer determ ines the m axim um sip output current required from the sip. based on that num ber, the chart will show a corresponding ripple current rating the designer needs to plan for when choosing input capacitors. example using sip s101: the designer knows the s101 is intended to provide 2.5v at m axim um 5a. using the s101 datashee t chart, this corresponds with 4a of ripple current. also known is that the capacitor the designer hopes to use has a ripple current rating of 2.2a. therefore, the designer m ust use two of the chosen capacitors in parallel for a total ripple current capability of 4.4a - which will be sufficient for the 4a requirem ent. o utput capacitance the only requirem ent for capacitance value is for basic circuit stability of the sip. that value is specified on the sip datasheet? usually 150 f. the other consideration for output capacitance is the total effective esr (equivalent series resistance). as with ripple current, every capacitor has a specified esr. w hen using m ultiple capacitors in parallel, this esr is added exactly like parallel resistors. therefore, m ore capacitors m ean less esr. the sip datasheet specifies a m axim um total esr necessary for optim um sip perform ance. the designer m ay also choose to add m ore capacitance to reduce output ripple and noise. exam ple using sip s101: the s101 datasheet specifies a m axim um esr of 100m 7 for output capacitance. the system designer wants to use a capacitor with a specified esr of 130m 7 . since 130m 7 is m ore than the needed 100m 7 , two capacitors m ust be used in parallel for a total effective esr of 65m 7 . g enerally, good, low esr bulk capacitors will be used for both input and output capacitance so that fewer capacitors are needed since board real estate is usually an im portant factor in today's designs. impact on output voltage ripple and transient response if the customer?s application requires a very low output voltage ripple and / or very low output voltage overshoot / u ndershoot during transients, then the guidelines previously shown need to be exceeded and good layout practices become mandatory. b y using four 330 f oscon capacitors, each having esr = 17m 7 , the output voltage ripple can be decreased to 50mvpk-pk on a 1.2v output sip. also during a transient load condition (load current steps from 20% to 100% and back, at 2 a / sec) the output voltage does not overshoot / undershoot more than 100mv. w hen fast and deep transient loads are expected, the input capacitor becomes important as well, especially if the sip i s far from its input voltage source. capacitors having as much as 2000 f and combined esr lower than 20m 7 might be needed. p ractical results heavily depend on physical layout and specific load conditions. for critical applications the customer i s encouraged to consult with the manufacturer.
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